BIOS beeps. BIOS beeps Set parameters for FPM DRAM, EDO DRAM and Synchronous DRAM

Golovna / I'll build a cleaning

The BIOS can take revenge on a lot of improvements, it’s easy to understand them, because it doesn’t help to understand clearly the principles of their work. To that richly koristuvachiv ask: PCI Latency Timer, what is it? Let's figure it out, what is needed is the function and how to correctly fix it.

This BIOS parameter is set, as long as it will be attached, connected to the PCI bus, used for needs, for transferring your data over it. Until the end of a certain hour (number of cycles), the other extensions, like a broken PCI bus, will not be able to speed it up. For locking, the value of the function is 32 or 64 cycles, and in most cases you can safely increase it. The minimum value is 32, with which short cycle that wins, there can be successive increases by 32 bars (64, 96 and so on), right up to 224.

Possible option values

The maximum value of the function can be set equal to 248.

How to set the parameter correctly

Shifting the PCI Latency Timer value helps to improve the efficient throughput of a single bus, which in some cases can lead to incorrect operation of some high-performance devices, as they transmit and take great amounts of information. For example, such problems are often blamed on RAID controllers.

It is recommended that you try to increase the value of this parameter, especially if the computer has a set of expansion cards, such as PCI-pins. In this way, step by step (by 32 cycles) increase the value of the PCI Latency Timer before the start of the operating system, after which it is important to respect the productivity of the robotic computer and its software.

If everything is functioning normally, then you can gradually increase the PCI Latency Timer value to approximately 160 clock cycles and go higher, which is a serious need. On the other hand, in case of faults in the robot PCI-attachment, the value of the higher-designated parameter should be changed, up to 64 or 32 cycles. This is the need to blame, if the PCI bus has a lot of attachments, some of them require priority access to the bus for non-milk work. Just keep in mind that by setting the PCI Latency Timer parameter to equal 32, you can fix similar problems.

- (Timer for the clock for the PCI bus). The value of this option is specified, after a certain time (at the PCI bus cycles) a PCI card that enables the “Busmaster” mode can take control of the PCI bus, so another PCI card is brought to the bus. In fact, it's a timer that separates the busy hour of the PCI bus with a bus master add-on. After the end of the given hour of judging the tire, the primus picks up the tire from the master, transferring it to another extension. The allowable range for changing the parameter is from 16 to 128 with a minimum, divisible by 8. However, in some cases, the Auto Configured value is added (for locking), which significantly eases the confusion and torment of the coristuvach.

The value of the parameter must be changed carefully, it should be left in the specific implementation of the motherboard, and only in case there are at least two PCI cards installed in the system, which support the “Busmaster” mode, for example, SCSI cards. Graphics cards do not support Busmaster mode. The less important it is to install, the more important it is to use another PCI card that allows access, denying access to the bus. If it is necessary to see for a robot, for example, a SCSI card is more than an hour old, you can increase the value for the PCI slot, in which case you know. The value for the border map, for example, may need to be changed or set equal to 0, if in some cases setting 0 is not recommended. In a wild way, as the value of the parameter attached is optimal for this system, lie in the form of stuck PCI-cards and check for additional test programs. It is also necessary to lie about what kind of world the “card-competitors” are sensitive to possible tricks.

The option can also be called: " PCI Bus Time Out", "PCI Master Latency", "Latency Timer", "PCI Clocks", "PCI Initial Latency Timer". For the rest of the option, a number of possible values can be seen: "Disabled", "16 Clocks", "24 Clocks", "32 Clocks". Another old option, " PCI Bus Release Timer", such a set of values is small: "4 CLKs", "8 CLKs", "16 CLKs", "32 CLKs".

And one more important respect. At the same time, this option (and similar to it) was introduced with the upgrade of the dual PCI- and ISA-buses. The ISA bus allowed one "master" attachment. It rarely stagnated like before, and now. Then the PCI-bus gave the possibility of a one-hour search for a number of "master" devices. It was necessary to overcome the problem of dual operation of the "master"-attachments on the PCI-bus and standard attachments on the main ISA-bus. Particularly appreciated were the widened sound cards for the ISA bus at that time, as there was an insignificant amount of buffer memory, tobto. sensitive to be-yakah zatrimok at the hour of the transfer of data. "AMI BIOS" allowing you to select the parameter value in the range from 0 to 255 with a single click. The value "66" was set after the default, although a smaller value with the PCI bus was the best. New versions of "AMI BIOS" have become less democratic: 32, 64, 96, 128, 160, 192, 224, 248 and "Disabled". Before that, one more name of the option was “mined” - Master Latency Timer (Clks)", and the meaning of "64" began to be restored behind the words.

Well, the truth is, not the whole list is possible. Functions " Latency Timer Value"і" Default Latency Timer Value If you set the remaining option to "Yes" (but not by default), then the first function will also be ignored.

"PCI Device, Slot #n",

"Default Latency Timer:",

"Latency Timer:",

Naturally, with these parameters, you can see the configuration submenu. For the nth card slot, you can select the default setting (“Yes”), otherwise the value in the bottom field will be entered in hexadecimal form. If you have access to the koristuvach to the Latency Timer field: there will be blocking. If you set "No" in the "Default Latency Timer:" option, then you will be able to manually set the values in the series: 0000h ... 0280h. The remaining value is 640 for the tenth.

Another option is the value of the "Latency Timer" option: "20h", "40h", "60h", "80h", "A0h", "C0h", "E0h", "Default" (that is "40h") .

Therefore, with a specific task (or problems) to face the core, it is necessary to get out of the capabilities of the chipset, BIOS version and expansion cards.

Without further ado, tweaking the BIOS is the basis of any computer, and perhaps the most important process of tweaking a system.

So many of you know that the BIOS is the basic input / output system, which means that the stability and reliability of the robotic system as a whole can be directly deposited. In order to optimize the computer's work and increase its productivity, you need to start with the basic improvements. Here you can reach the greatest efficiency.

And now about all the report. To enter the BIOS setup program (or Setup), just press " DEL(or " F2«) pіd hour zavantazhennya computer'yutor.

To turn the parameters after locking, select “Load SETUP Defaults” in the BIOS settings, reset the computer from the factory settings.

Below I will show the main adjustments, both for modern PCs, and for old meritorious ones, which I would like to turn into a game.

CPU Level 1 Cache– obov'yazkovo increase this parameter. Vіn vіdpovіdaє for winning the cache of the first equal, signifi cantly promoting the practicality of the system.

CPU Level 2 Cache– this parameter plays the least important role, lower forward. To that vmickaєmo yoga. As a final note: turning on the cache memory can only work when out of order, but it will also significantly reduce the productivity of the system as a whole.

CPU Level 2 Cache ECC Check– the parameter of increase/delete to the algorithm of re-verification of correction of pardons in cache-memory of the 2nd level. Increasing this parameter of the troch reduces productivity, but also increases the stability of the work. Since you are not engaged in overclocking the processor, the raju does not allow you to use this parameter.

Boot Up System Speed- The parameter can be set to High or Low and determines the speed of the processor and the frequency of the system bus. Our choice is High.

Cache Timing Control- Parameter keruє shvidkіstyu reading memory cache 2nd level. Our choice - Fast (Turbo) - high speed, high productivity.

We've finished configuring the processor, let's move on to setting up the operative memory. The settings can be found either in the "Chipset Features Setup" or "Advanced" section.

DRAM Frequency- The parameter determines the speed of the robot RAM. If you know exactly which parameter (sound on the packaging before the memory module), set it manually, if in doubt, select Auto.

SDRAM Cycle Length– the parameter sets the number of cycles required to send data to the bus after the CAS signal is received. One of the most important parameters that contribute to productivity. If memory allows, it is necessary to set the value 2.

RAS-to-CAS Delay- The number of ticks needed to complete a row of data before the trigger. It also contributes to productivity. The value 2 is shorter and fits in more ways.

SDRAM RAS Precharge Time- hour of recharging the middle of the memory. Sound the victorious meaning 2.

FSB/SDRAM/PCI Freq- Set the frequency of the FSB bus, SDRAM and PCI memory.

Memory Hole At 15-16M– Parameter allowance for seeing part of the address space for the memory of ISA add-ons. Obov'yazkovo to increase this parameter, as the computer has an old expansion card for the ISA bus installed, for example, a sound card is required.

Optimization Method- The parameter determines the total speed of data exchange with operational memory. It is marked by a clear path, beginning with the greatest significance.

Іsnuyut and іnshi parameters, nastuvannya yay allow significantly speed up the process of exchanging data with operational memory.

What is lower than the value of time clock or timing (their slang for IT engineers and system administrators), it is the productivity of the thing, but, perhaps, everything will be reduced to an unstable work.

Experiment with your health, don't forget that you can tweak the settings and tweak the factory settings.

CPU to PCI Write Buffer- if the processor is running with a PCI-attachment, the VIN is written to the port. Data when you need to go to the bus controller and give the register to the add-on.

If we enable this option, a write buffer will be set, which accumulates data before the PCI device is ready. І the processor is not guilty for the new check - you can release the data and continue the program. I will gladly give you this option.

PCI Dynamic Bursting- This parameter is also bound to the buffer record. Vіn turns on the mode of data accumulation, in case of any recording operation, it will be carried out only once, if there is a packet of 32 bits in the buffer. Vmikati obov'yazkovo.

PCI Latency Timer– parameter to set the number of cycles that the skin PCI-device will use to perform the data exchange operation. The more tact, the greater the efficiency of robots and attachments. However, due to the nature of the ISA add-on, this parameter cannot be increased to 128 cycles.

The video card, as a rule, contributes most to the productivity in games, so the optimization of the video card can be badly recognized by the high speed of the robotic system.

It is especially important for happy old video cards with AGP interface. Let's look at the main parameters.

Display Cache Window size– parameter defines the size of the memory that is cached for the needs of the video system. If your computer has less than 256 MB of RAM, set the value to 32 MB. Otherwise, enter 64 MB.

AGP Capability– Sets the robotic video card mode. The main characteristics of the productivity of AGP-video cards. Choose the best-seeing mode - 8X.

However, not all video cards support this mode. As soon as the computer is reset, the operating system will not start up, otherwise the image has deteriorated, the value of this parameter has changed.

AGP Master 1WS Read / 1WS Write– parameter sets the number of ticks in one cycle of reading and writing. As with the improvement of operational memory, the timing parameter significantly increases the productivity of the process, while preventing the instability of the read and write operations.

When this option is enabled, reading/writing is performed in one cycle - maximum productivity. When the parameter is disabled, the system works stably, but more correctly.

VGA 128 Range Attribute– enable the exchange buffer between the central processor and the video adapter. Productivity grows.

Also, turn off the AGP Spread Spectrum option and obligatorily turn on the AGP Fast Write Capability.

HDD S.M.A.R.T Capability– the parameter enables or disables the S.M.A.R.T. Vikoristovuvat tsu system chi nі virishuvati you. I especially mime, because vicorist specialized software. When working, the function of the troch reduces the speed of the robotic computer.

IDE HDD Block Mode- Parameter that is valid for block data transmission. Tobto. more information is transmitted per hour, which also increases the productivity of the system. You can automatically assign a specific parameter.

IDE Burst Mode– parameter connects the data exchange buffer from the IDE interface, which also increases productivity.

Virus Warning- I turn on this function for sure. You can't replace the anti-virus, and your productivity axis is bogus.

Quick Power on Self Test (or Quick Boot)– it is necessary to increase this parameter so that the computer hardware part is not tested. Korist is also practically non-existent, and the resource is spent.

Boot Up Floppy Seek– disable this parameter. We do not need a search for an investigative floppy disk at the hour of starting the computer.

First of all, as the system does not start up after re-entry, and / or sound signals go, go back into the BIOS and set the parameters for locking (I described how to try on the cob of statistics).

Otherwise, there is only one correct way to unplug the laptop - turn off the computer, remove the life cable, open the cover of the system unit and carefully remove the battery from the motherboard, after 2 insert it back, take the computer and try to start it. It is necessary to reset the parameters, adjust the BIOS to return to the standard values, and the system will start in the normal mode.

The value of the parameter must be changed carefully, it should be left in the specific implementation of the motherboard, and less so, as there are less than two PCI cards installed in the system, which support the "Busmaster" mode, for example, SCSI cards. Graphic cards do not support "Busmaster" mode. The less important it is to install, the more important it is to use another PCI card that allows access, denying access to the bus. If it is necessary to see for a robot, for example, a SCSI card is more than an hour old, you can increase the value for the PCI slot, in which case you know. The value for the border map, for example, may need to be changed or set equal to 0, if in some cases setting 0 is not recommended. In a wild way, as the value of the parameter attached is optimal for this system, lie in the form of stuck PCI-cards and check for additional test programs. It is also necessary to lie about what kind of world "card-competitors" are sensitive to possible zatrimok.

PCI Bus Time Out", "PCI Master Latency", "Latency Timer", "PCI Clocks", "PCI Initial Latency Timer For the rest of the option, a number of possible values are available: "Disabled", "16 Clocks", "24 Clocks", "32 Clocks". Another old option, " PCI Bus Release Timer", such a set of values is small: "4 CLKs", "8 CLKs", "16 CLKs", "32 CLKs".

And one more important respect. At the same time, this option (and similar to it) was introduced with the upgrade of the dual PCI- and ISA-buses. The ISA bus allowed one "master" attachment. It rarely stagnated like before, and now. Natomіst PCI-bus gave the possibility of a one-hour trial of a number of "master"-devices. It was necessary to solve the problem of dual operation of the "master"-attachments on the PCI-bus and standard attachments on the main ISA-bus. Particularly appreciated were the widened sound cards for the ISA bus at that time, as there was an insignificant amount of buffer memory, tobto. sensitive to be-yakah zatrimok at the hour of the transfer of data. "AMI BIOS" allowing you to select the parameter value in the range from 0 to 255 in a single click. The value "66" was set after the default, although a smaller value with the PCI bus would be better. New versions of "AMI BIOS" have become less democratic: 32, 64, 96, 128, 160, 192, 224, 248 and "Disabled". Before that, one more name of the option was "mined" - " Master Latency Timer (Clks)", and the meaning of "64" began to be restored behind the words.

Well, the truth is, not the whole list is possible. Functions " Latency Timer Value"і" Default Latency Timer Value If you set "Yes" in the remaining option (but not for locking), then the first function will also be ignored.

"PCI Device, Slot #n",

"Default Latency Timer:",

"Latency Timer:",

Naturally, with these parameters, you can see the configuration submenu. For the nth card slot, you can select the default setting ("Yes"), otherwise the value in the bottom field will be entered in hexadecimal form. With this, the access of the koristuvach to the field "Latency Timer:" will be blocked. If you set "No" in the "Default Latency Timer:" option, then you will be able to manually set the values in the series: 0000h .... 0280h. The remaining value is 640 for the tenth.

Another option is the value of the "Latency Timer" option: "20h", "40h", "60h", "80h", "A0h", "C0h", "E0h", "Default" (that is "40h") .

Therefore, with a specific task (or problems) to face the core, it is necessary to get out of the capabilities of the chipset, BIOS version and expansion cards.

PCI Parity Check

deactivating chipsets, for example, in front of server systems, enable (through "Enabled") to control the flow of data on the PCI bus per parnistyu. Under what control are both address data and data. Pardons are not corrected, but koristuvach is informed about them. What is also important, such a method of control can be supported by the PCI expansion card itself.

The option can be called i " PCI Parity Checking", or" PCI Bus Parity Checking".

PCI Preempt Timer

For the selection, the following values are transmitted: 5, 12, 20, 36, 68, 132, 260, for the digital display, or for the selection of the single display - "5 LCLKs" and so on. Obov'yazykovim є parameter No Preemption (or Disabled). Moreover, the rest, as a rule, is restored to the mind. This option in such a look is no longer stagnant, so it can be difficult to use it on older machines. If two "master" attachments on the PCI bus are used, the "Disabled" value (or similar) can be replaced more optimally.

The option can be called i " PCI Preemption Timer".

PCI to ISA Write Buffer

In the enabled station ("Enabled"), the system, without interrupting the work of the processor, writes data in a timely manner to a special buffer for further data transmission at the most appropriate moment. Otherwise ("Disabled"), the write cycle to the PCI bus will be forwarded directly to the other ISA bus. The need for such a function, or rather in such a buffer, is due to the fact that the security of the ISA- and PCI-buses is different. Increase the buffer memory to allow the PCI bus not to check until the ISA bus has received all the data.

Peer Concurrency

Diya tsієї optsії zachіpaє і spilnu robot PCI-and ISA-tires. For example, PCI bus cycles can be resampled and buffered for up to an hour of ISA operations, such as DMA transfers in "Bus-Master" mode. The parameter can take a value:

"Enabled" (for locking) - allowed,

"Disabled" – fenced.

The option can be called i " PCI Concurrency"abo" Bus Concurrency"Additional extensions," in order to prevent competition ", are declared in the options" PCI/IDE Concurrency"abo" PCI-to-IDE Concurrency".

One of the characteristic features of the PCI-bus and її systems of bridges is the ability to exchange data between the processor and memory at the same time with exchanges between other subscribers of the PCI bus - Concurrent PCI Transferring. However, this capability is implemented not by all chipsets, but by the main bus subscribers (graphic cards, disk controllers, etc.) rarely.

"AMI BIOS" through the "Enabled" (enabled, disabled) and "Disabled" (disabled, enabled) variables propagate "correct" with the interface signals of the PCI bus: PERR# and SERR#. Contacts B40 and B42 are valid for these signals. Dekilka slіv about the signals themselves.

"PERR#" - I/O PCI Parity Error. The signal is inserted by receiving data on the bus via a bus cycle after the PAR signal is seen (Parity Error - pin A43). The PERR# signal becomes active, as parity parity has been enabled on the PCI bus. When this occurs, the "Enable" bit is set in the PCICMD registry by the PERR # signal. As an option, it is possible to block a signal about a pardon ("Disabled" is set for a lock).

"SERR#" - I/O PCI System Error. The result also sets the "SERRE" bit (SERR # Enable) in the PCICMD registry. The purpose of the integration signal, for the display of such a need for one mind:

1. The PERR# signal is set on the PCI bus, which is controlled by bit 3 of the ERRCMD registry,

2. The SERR# signal will be asserted after one bus clock cycle after a significant failure in data transmission at the PCI-cycle initiation process,

3. The SERR# signal will be set every hour of ECC operations. The ECC pardon is signaled via the ERRCMD control register when correcting a one-bit pardon or a multiple uncorrected one,

4. The SERR# signal will be set if parity parity on the PCI bus is scheduled for the first hour of address data transmission with one-hour setting of such pardon signals in other registers,

5. There may be additional situations, for example, setting the pardon input signal G-SERR # in bit 5 of the ERRCMD registry.

16 Bit ISA I/O Command WS

This option is victorious to compensate for possible differences between the speed of robots and system attachments of the PC and other peripherals. Similar compensation is needed, for example, as the system did not see the additional hour of reconciliation / refurbishment. In such a situation, the system may fail, if any unsuccessful application of attachments does not function at all and stop giving a drink for the introduction / removal of this attachment. I have given the option to turn on the switch ("Disabled") to move the code only at the entrance, if all the outbuildings function normally in this mode, otherwise data loss is possible. Naturally enabled options for the capacity of the ISA-card expansion system.

The option may be called " ISA 16-bit I/O Wait States

16 Bit ISA Mem Command WS

This option for recognition is similar to the previous one, but with less difference, which allows you to use the memory of the ISA-attachment with the ability of the system to write / read from the memory. The parameter can take a value:

"Enabled" - allowed,

"Disabled" – fenced.

The option may be called " ISA 16-bit Mem Wait States When this happens, it is possible to set the number of clock cycles manually: 0, 1, 2, 3.

ISA bus clock setting option. The standard value of the ISA bus speed should be close to 8.33 MHz. On the vіdmіnu vіd vіd іn old systems nіnі nі svidkіst ISA-tire without intermediary pov'jazan zі nі vіdkіstyu PCI-tire through t.zv. "Pivdenny" city You can set a higher tire speed by selecting the appropriate parameter (dilnik). This parameter determines the security of the PCI bus and sets the security of the ISA bus.

For example, the clock frequency of the PCI bus becomes 33 MHz. If you change the timer from PCICLK/4 to PCICLK/3, then the ISA bus works best at 11 MHz. But it is necessary to remember that the increase in clock frequency can lead to overheating of the elements of the ISA-card and out of tune. In the short term, the risk may be pardoned for an hour of work, it is especially unsafe for disk controllers (for older systems). If you want a lot of ISA attachments to work on higher speeds, you need to lower the tire speed, as if the ISA attachment is not functioning properly.

With that said, in order to correctly set the ISA bus clock speed, you need to know the PCI bus clock speed. In this case, there are those that in the first systems with a different PCI-bus, the frequency of the PCI-bus itself lay close to the system clock frequency, and therefore the value is low: 25, 30 and 33 MHz, just barely. In "older" systems, the frequency of the ISA bus was "tied" to the system frequency, as it was dialed from 16 to 50 MHz, thereby giving space for the ISA bus

Option at different hours small and different names: " ISA Clock", "ISA Clock Frequency", "ISA Bus Clock Frequency", "ISA Bus Clock Option", "ISA Bus Speed", "ISA Clock Select", "ISA Clock Divisor", "AT BUS Clock", "AT Bus Clock Frequency", "AT BUS Clock Selection", "AT Bus Clock Source The presence of the names of the options under "AT Bus" indicates the "old age" of the options. 8.33 MHz - not the "old" clock frequency of the IBM AT bus.

Well, finally, a number of possible parameters for selection: PCI (or PCICLK, or CLK (for the system bus)) / 2, 3, 4, 5, 6, 8, 10 and enter 12, as well as a fixed value - "7.159 MHz "(it can be installed and for lock-in). I need to know again that the ISA system interface boards were designed for this fixed frequency. For systems with 286 and 386 processors, CLK could mean half the speed of the CPU core. So in the settings of the ISA-bus security the parameter appears as CLK2/x.

One more respect. It is necessary not to forget about the speed of the ISA bus when overclocking the processors, as the overclocking will be the clock frequency of the system bus.

Something else is available in the option " ISA Clock Select Enable By setting the option to "Disabled", we will accept the standard frequency of the ISA bus (PCI / 4), by selecting "Enabled", we will be able to manually change the bus frequency.

І one more option namkinets - " PCI-ISA BCLK Divider" (BCLK - Bus CLK). First value: "AUTO", "PCICLK1/2", "PCICLK1/3", "PCICLK1/4".

AT BUS Clock Selection(Selecting the EOM bus synchronization method): Sets the coefficient of the CPU clock frequency to restrict access to the ISA/EISA bus. Incorrect setting may result in a significant decrease in productivity. Values are given in virazas like CLK/x or CLKn/x, de x can be 2, 3,4,5 and so on. CLK is the clock frequency of the CPU, depending on the number of processors, which will require a number of call synchronization schemes - that for 486DX33, 486DX2/66 and for 486DX3/99 the value will be 33. You should try if you can get IBM; pratsyuvati i shvidshe, ale tse robiti not obov'yazkovo). Deyakі sistemnі platy mayut clock frequency 7.15 MHz. Typical (recommended) settings: CPU SWID code Default setting 16 CLK/2 25 or DX2/50 CLK/3 33, DX2/66 or DX3/99 CLK/4 40 or DX2/80 CLK/5 50 or DX2/10 You can try other values to increase efficiency. If you choose too small a timer (CLK/2 for DX33), the system may freeze. For the big game (CLK/5 for DX33) the efficiency of ISA boards will change. This installation is recognized only for data exchange with ISA boards, but not VESA, as it works synchronously with the CPU clock frequency - 25, 33 MHz and more. If your ISA board may have sufficient speed, you can try setting the clock speed to 12 MHz. To be fair, if you change the quartz resonators to change the CPU clock frequency, then you change the ISA bus frequency at the same time - so you don't change the shifts to compensate. Just because you can increase the CPU clock speed doesn't mean you can increase the bus clock speed. It is quite possible, that the problems can be blamed only for one fee - but that's enough.

ISA Clock Frequency The clock frequency of the ISA bus. On most boards, you can enter the main board frequency (25/33/40/50 MHz) on the instructions for the parameters of the board. The frequency of 8 MHz was transferred by the standard, most boards successfully work at 10-13 MHz, and deaks - at 16-20-25 MHz. The frequency increase will speed up the exchange between the boards (on other buses it doesn’t get out of the way), but the risk of pardons increases when working (especially unsafe for disk controllers - data can be affected when they are transmitted).

ISA Command Delay

Option to set up a jam before transmitting data on the ISA bus. This old option allowed to select the standard operating mode for ISA devices ("Normal Delay") and insert an additional clock cycle ("Extra Delay").

ISA Slave Wait States

Option to set clocks for ISA-attachment, which is used in the bus master mode, that is. "Master" - I'll add it. Possible values: "4 WS", "5 WS". A similar option could be called " ISA Wait States"Zi values" 5 ISACLKs "and" 4 ISACLKs "to talk specifically about clock cycles in the frequencies of the ISA bus.

7.Peripherals & Resources

7.1. Functions of "connection" of peripheral devices

sensing options are intuitively sensible, and there are only two possible parameters: "Enabled" (enabled) and "Disabled" (disabled).

Init AGP Display First

When set to "Enabled", the system's first display is connected to the AGP card. If "Disabled" is selected, then the tone is set by PCI card or by ISA.

Similar function and option Init Display First" with the parameters "AGP" and "PCI" ("PCI Slot"). For the presence in the system of one video adapter, these options do not cause problems. , which is quite real, the only option for connecting two displays, there is a situation, if the PCI adapter cannot be used by others.

New similarly functional option " VGA BIOS Sequence" (sequence of video card BIOS capture) with "PCI/AGP" and "AGP/PCI" parameters.

The same value ("AGP" and "PCI") is passed by the option " Default Primary Video" to "AMI BIOS".

With the option " Primary Display We were already talking in the "Boot" distribution. This type has the "Phoenix BIOS" option for something else. Axis possible values: "AGP VGA" (capture sequence - ISA VGA, AGP VGA, PCI VGA) and "PCI VGA" capture sequence - ISA VGA, PCI VGA, AGP VGA).

Another option to choose is the option " Init Display First"at the time of integration of the video adapter on the motherboard. The values can be: "Onboard" and "PCI Slot".

Nasamkinets more "ancient" version of a similar function under the name " Graphics Adapter" with the parameters "VL Bus" and "PCI Bus".

Joystick Function

For the presence in the system of the joystick and the induced options, it is necessary to set it to "Enabled".

LAN Controller

Option for enabling/fencing ("Enabled"/"Disabled") robotic adapter installed on the motherboard. Enable the system with a built-in controller, turn it on with the value "Disabled" set, zavantazhuyu system, denoting its presence, automatically transfer the option for the inclusions of the camp.

Multiple Monitor Support

Option to support the number of monitors. There is nothing supernatural in this function. It's similar to the "Default Primary Video" option, but... The option is set, which graphic controller will be the first in the system. You can take the following values:

"Motherboard Primary" - active graphics controller, integration with the central processor,

"Motherboard Disabled" - active graphic controller, chipset integration,

"Adapter Primary" is the active graphic controller of the expansion board.

Onboard FDC Controller

Option, initially selected ("Enabled" - by default) to enable the floppy drive controller located on the motherboard, then. vbudovanogo (onboard).

"Phoenix BIOS" to change these options (" diskette controller", "floppy disk controller") with the same values - "Enabled"/"Disabled".

As far as possible, the names of the functions from the connected floppy drive are not excluded. Also "AMI BIOS", that "Award" can be added. Todi maybe like this:

"Onboard FDD Controller", "Onboard FDC", "Floppy Interface The rest of the two variations, the most significant "on / off." may still be added as an auto-configuration ("Auto"). Let's try to figure out which floppy controller shows up as a valid IRQ6 when fetching a floppy controller.

"Phoenix BIOS" in its other variations " Floppy Interface" by propagating the values "Auto Configured" and "Disabled". In parallel, another option, " Floppy Status", made it possible to display the drive station on the monitor screen at the system capture process.

Onboard Parallel Port

This option allows you to disable ("Disabled") the use of a given parallel port, automate the process of viewing the necessary resources ("Auto") or set the base address of the input/output manually ("378" or "278").

The option may be called " Parallel Port", the meaning of which can be offensive:

"Enabled" - if necessary, add-on fields with manual setting of configuration parameters become available for the koristuvach,

"Auto" - addresses, reset, DMA channels will be set automatically,

"OS Controlled"- these problems may affect the operating system. In other versions of the BIOS, a similar option may be called " PnP OS".

The option can be called i " parallel".

Option " Parallel Port Interface in a seemingly small menu, I prompted the following number of parameters:

"LPT1... 378... IRQ7" - this value will be selected during autoconfiguration,

"LPT1... 378... IRQ5",

"LPT2... 278... IRQ7",

"LPT2... 278... IRQ5",

"LPT3... 3BC... IRQ7",

"LPT3... 3BC... IRQ5",

"Auto Configured" (for the lock).

The rest of the option is already "outdated". More "rarities" and a small menu with the following options:

"On Board LPT 3",

"On Board LPT 2",

"On Board LPT 1"

with the standard values "Disabled" and "Enabled". Previously, it was important that the system automatically assigns the names of the LPT1 to LPT3 ports, whether it be shown to parallel ports (so it’s all at once, and you may not know how “hidden” the processes are, but turn on the one-hour support for three ports ... ). Appointment of other resources - "right hand" PnP-compatible OS and koristuvach.

Onboard PCI IDE Enable

- (Permission of the robotic integrated IDE controller). This parameter is required by the permission/fencing of the robotic skin from two channels of the IDE controller installed on the motherboard. You can take the following values:

"Primary" - the robot is allowed only for the first channel,

"Secondary" - the robot is allowed for another channel,

"Both" - it is allowed to work both channels (for locking),

"Disabled" - both channels are blocked for the robot.

In "dopentium" hours, the function was introduced, as a rule, the integrated function also replaced it. Onboard 496B IDE Port However, the name of the function did not appear to be correct, although it has taken root in other versions of the BIOS. On the right, in that the numbering of ports was always presented (and is presented) in 16-decimal format. Here, the 496th port is no less than the 10th port numbered 01F0. For the primary IDE channel, 8 one-byte ports numbered 01F0-01F7 were introduced. 0170-0177 The axis is such a story!

The choice of chotiri values is typical for the options " onboard IDE", "IDE controller", "Onboard Local Bus IDE", "Local Bus IDE adapter", "Internal PCI/IDE Varto guess, if you want to write a lot about it, what low-width attachments (for example, a CD-ROM) can be rolled out on the secondary channel.

Trochy old option " Onboard IDE Controller" did not allow the secondary interface to be changed independently and the value is small: "Primary", "Both", "Disabled". Option "Phoenix BIOS" " Hard Disk Controller"prompted similar values:" Primary "," Primary And Secondary "(when IRQ14, і IRQ15 became occupied), "Disabled". "Disabled", but on those boules, as it seems, do your own thing.

For some types of integration, the option can be replaced by two (" Onboard IDE-1 Controller", "Onboard IDE-2 Controller"), and yet not to show the folding of the leather from the channels of the okremo. Also apply with two options:

"Primary IDE Channel", "Secondary IDE Channel",

"OnChip IDE First Channel", "OnChip IDE Second Channel",

"On-chip Primary PCI IDE", "On-chip Secondary PCI IDE",

"PCI Slot IDE 1st Channel", "PCI Slot IDE 2nd Channel",

"PCI IDE 1st Channel", "PCI IDE 2nd Channel",

"Primary PCI IDE Interface", "Secondary PCI IDE Interface".

The remaining pair of options ("Phoenix BIOS"), instead of the most important values ("Enabled"/"Disabled"), were called "Auto Configured" and "Disabled". With whom, one more pair (" Primary PCI IDE Status", "Secondary PCI IDE Status") through "Enabled" made it possible to enter the channel station of the interface at the process of entrapment of the system.

At the initial stages, the development of the EIDE-interface can be used to clarify the situation, if the primary options for enabling / enabling the IDE-interface were selected (" On-Chip PCI IDE", "On-Chip IDE Controller"), to which the possibility of managing the second channel was added. Everything was explained by the need to eliminate the conflict situation on the main, that is, the primary channel. Axis and appeared such "lonely" options: " IDE Second Channel Control", "2nd Channel IDE". There are more words behind the secondary interface! When the option is set to "Enabled", IRQ15 is assigned to the secondary IDE channel. If the option is set to "Disabled", IRQ15 can be changed for other devices. which I will attach to the 2nd IDE channel.

Onboard Serial Port ½

Option to enable/disable and install system resources (port addresses and redirection) to enable the first and second last ports. Although "BIOS Setup" allows it, it is recommended to set it to "Auto". Standard and with so many correct settings, as it is unlikely that you will need to change it later, you can remove it at the beginning of the "BIOS Setup" installation for the defaults. You can take the following values:

"3F8/IRQ4" - first serial port,

"2F8/IRQ3" - another serial port,

"3E8/IRQ4" - first serial port,

"2E8/IRQ3" - another serial port,

"Disabled" – the last ports (or the port) have been fenced off. With any perevannya, who are called, they can be victorious in other purposes,

"Auto" (or "Auto Configured") - the system automatically selects the I/O address for the reset.

There may be additional addresses that can be redirected, and the values may be represented by, for example, "3F8/COM1" and so on.

The option can also be called: " Onboard Serial Port A/B", "Onboard Serial UART1/2", "Onboard UART 1/2", "Serial Port 1/2 Interface", "Serial 1/2".

At different serial interfaces, conflicts will be heard when the third or fourth serial port is added. Therefore, in systems with an ISA bus, unpaired serial ports (1 and 3) often overlap on one retry; it should be brought to the twin ports (2 and 4). Like, for example, "Misha" is connected to the com2 port, and the internal modem is connected to the com4 port, then the attachments can be set up for the same transfer, and it is not possible to win them all at once.

offboard pci ide card

This "AMI BIOS" option is for enabling the IDE interface located on the PCI expansion card. When this happens, the existing PCI IDE controller at the initial stage of assignment is automatically blocked from budding (onboard - marvelous) IDE-interface. Possible values: "Auto", "Slot1", ..., "Slot6". If "Auto" is set, the BIOS will automatically assume the correct settings, including the default of the installed controller, so the default will not be changed.

- (Feedback to PCI 2.1 bus specification). Under the hour of the violation of this parameter, the possibility of specification 2.1 of the PCI bus is considered. Specification 2.1 may have two main powers in specification 2.0: the maximum bus clock frequency is reduced to 66 MHz and a PCI-PCI bridge mechanism is introduced, which allows the exchange of the specification 2.0 Prior to that, the change of specification 2.1 made it possible to optimize the latency of PCI- and ISA-buses (report in the "Delayed Transaction" option). The protection of this parameter may be sensible only in case of vindictive problems after installing an additional PCI-card (as a rule, problems can be vindicated only with old PCI-attaches), as well as with ISA-attachments, as they do not buffer their own information, and therefore support this specification. The parameter can take a value:
"Enabled" - allowed,
"Disabled" – fenced.
The option may be called PCI 2.1 Compliance.

PCI Clock Frequency

PCI bus frequency setting option. This option was implemented on the first "pentium" machines, and then transferred to 486 systems with AMD processors and PCI bus. The bus frequency through the multiplier was "bound" to the frequency of the central processor and the next set of values was small: "CPUCLK / 1.5" (for locking), "CPUCLK / 2", "CPUCLK / 3" and fixed "14 Mhz" (before and so !).
The "PCI Clock Speed" option had the following values: "Same as CPU", "2/3 CPU", "CPU/2", "1/8 CPU". The "HCLK PCICLK" option was a dilnik between the system frequency and the local bus frequency: "1-1", "1-1.5", "AUTO". The "PCI Bus Frequency" option propagated the values "CPUExt/3", "CPUExt/2.5", "CPUExt/2", and the stench linked the PCI bus frequency to the system one. The CPU Host/PCI Clock option only allowed the standard 33 MHz for the PCI bus through the Default value.
The front picture would be uneven without two options. The option "PCI Clock Speed Override" through the value "Enabled" in turn allowed to "re-assign" the frequency of the PCI-bus, and the axis option "PCI CLK" could increase the adjusted clock speed. The value "Asynchronous" allowed to select a certain frequency for the PCI bus. And the value axis "Synchronise" "shortly" tied the clock frequency of the system bus and the frequency of the PCI bus. Just ahead of the help of jumpers on the system board, it was necessary to set the system frequency and multiplier for the processor and as a result, take, for example, for Pentium 120 frequencies: 120, 60 and 30 MHz (PCI bus).
Significantly better option is the "PCI/AGP Clock" option. This means that this option sets the frequencies for two buses, although recently different versions of the BIOS did not give such possibilities. Guidance variant of the option for a larger world of assignments for "overclocking" attachments on the PCI-bus (non-secure) and for AGP. option value, then. bus frequencies are directly related to the system bus frequency settings in the "CPU Host Clock" option. If the rest is changed or more than 100 MHz, then for PCI and AGP the values are set to "CPU Host Clock"/3 and /1.5. For the lower frequency of the processor bus, the difference is changed to 2 and 1. Since the system frequency is higher than 66 MHz, then PCI and AGP should have a standard speed of 33/66 MHz. The same, tobto. the standard option is available at a frequency of 100 MHz. All other values of the system bus frequency lead to "overclocking" of both interfaces.
Modern systems with options like "System/PCI Frequency (MHz)" provide the widest possibilities for "overclocking", and do not set the number of values, but rather a solid menu with a number of parameters, starting with the value "100/33" (divisor 3: 1) and ending with the values "178/44.51" (diary 4:1) and ending with a system bus of 1 MHz. Everything would be wonderful, the yakbi would not be an element of the rizik. Practically all motherboard manufacturers have successfully become the task of overclocking PCI- and AGP-interfaces, giving the rest of the plan the ability to accelerate the system bus and processor without being drawn into this overclocking of other system components. The first "Lastivkoy" of this "Rocked" light was the motherboard type "Gigabyte" - GA8IRXP, sho proponovala adjunctive okremі dilniki for skin tires and cym gave the possibility to essentially set the optimal frequency of PCI and AGP interfaces independently from the system "signed".

PCI Dynamic Decoding

Setting to "Enabled" allows the system to remember the PCI command as requested. As soon as next commands are run from the same address area, write cycles are automatically interpreted as PCI commands.

PCI Latency Timer (PCI Clocks)

- (Timer for the clock for the PCI bus). The value of this option is specified, after a certain time (for PCI bus cycles) a PCI card that enables the "Busmaster" mode can take control of the PCI bus, as another PCI card is brought to the bus. In fact, it's a timer that separates the busy hour of the PCI bus with a bus master add-on. After the end of the given hour of judging the tire, the primus picks up the tire from the master, transferring it to another extension. The allowable range for changing the parameter is from 16 to 128 with a minimum divisible by 8. However, in some cases, the value "Auto Configured" (for locking) is also added, which significantly eases the need for such suffering.
The value of the parameter must be changed carefully, it should be left in the specific implementation of the motherboard, and less so, as there are less than two PCI cards installed in the system, which support the "Busmaster" mode, for example, SCSI cards. Graphic PCI-cards do not support the "Busmaster" mode, more, they did not. The less important it is to install, the more important it is to use another PCI card that allows access, denying access to the bus. If it is necessary to see for a robot, for example, a SCSI card is more than an hour old, you can increase the value for the PCI slot, in which case you know. The value for the border map, for example, may need to be changed or set equal to 0, if in some cases setting 0 is not recommended. In the extreme case, as the value of the parameter is optimal for this system, lie in the form of stuck PCI-cards and check for additional test programs for the final operation. It is also necessary to lie about what kind of world "card-competitors" are sensitive to possible zatrimok. Vrakhovuchi said above, guessing about the use of one more "master" - I will add, and myself - the central processor. Also, too much underestimation of the value of the clock can be seen in the efficiency of managing the processor of the local bus.

The option can also be named: "PCI Bus Time-out", "PCI Master Latency", "Latency Timer", "PCI Clocks", "PCI Initial Latency Timer". For the rest of the option, a number of possible values are available: "Disabled", "16 Clocks", "24 Clocks", "32 Clocks". Another old option, "PCI Bus Release Timer", has a small set of values: "4 CLKs", "8 CLKs", "16 CLKs", "32 CLKs".
And one more important respect. At the same time, this option (and similar to it) was introduced with the upgrade of the dual PCI- and ISA-buses. The ISA bus allowed one "master" attachment. Tse zastosovuvalosya rarely, as before, so it remains the fate of the ISA-tire. Natomіst PCI-bus gave the possibility of a one-hour trial of a number of "master"-devices. It was necessary to solve the problem of dual operation of the "master"-attachments on the PCI-bus and standard attachments on the main ISA-bus. Particularly appreciated were the widened sound cards for the ISA bus at that time, as there was an insignificant amount of buffer memory, tobto. sensitive to be-yakah zatrimok at the hour of the transfer of data.
"AMI BIOS" allowing you to select the parameter value in the range from 0 to 255 cycles in a single cycle. The value "66" was set after the default, although a smaller value with the PCI bus would be better. New versions of "AMI BIOS" have become less democratic: 32, 64, 96, 128, 160, 192, 224, 248 and "Disabled". Before that, one more name of the option was "mined" - "Master Latency Timer (Clks)", and behind the locks, the value "64" began to be restored.
Well, the truth is, not the whole list is possible. The functions "Latency Timer Value" and "Default Latency Timer Value" are activated in sequence. If you set "Yes" to the rest of the options (but not for locking), then the first function will be ignored. Trohi already mentioned about the possibility of installing parameters for okremih slots. This axis implements the "Phoenix BIOS" feature:
"PCI Device, Slot #n",
"Default Latency Timer: ",
"Latency Timer: ",
Naturally, with these parameters, you can see the configuration submenu. For the nth card slot, you can select the default setting ("Yes"), otherwise the value in the bottom field will be entered in hexadecimal form. With this, the access of the koristuvach to the field "Latency Timer:" will be blocked. If you set "No" in the "Default Latency Timer:" option, then you will be able to manually set the values in the series: 0000h .... 0280h. The remaining value is 640 for the tenth.
Another option is the value of the "Latency Timer" option: "20h", "40h", "60h", "80h", "A0h", "C0h", "E0h", "Default" (that is "40h") .
Therefore, with a specific task (or problems) to face the core, it is necessary to get out of the capabilities of the chipset, BIOS version and expansion cards.

PCI Parity Check

Deyaki push the chipset, for us in front of server systems, enable (through "Enabled") to control the flow of data on the PCI bus per parnistyu. Under what control are both address data and data. Pardons are not corrected, but koristuvach is informed about them. What is also important, such a method of control can be supported by the PCI expansion card itself.
The option may be called PCI Parity Checking or PCI Bus Parity Checking.

PCI Preempt Timer

- (Waiting timer for PCI bus). At first glance, this function is similar to that of the PCI Latency Timer, it is possible to wind up a deuce of a swindler, if you want something to go wrong. The value of these options is specified, after a certain time (for PCI-bus clocks, or local clocks - LCLKs) PCI-card, which supports the "Busmaster" mode, you can not control the bus, but try to clear the bus while another card is running. The bus arbitrator determines the hourly interval from the moment of submitting the request, after which the "master" is attached, which points, checks his "comrade".
For the selection, the following values are transmitted: 5, 12, 20, 36, 68, 132, 260, for the digital display, or for the selection of the single display - "5 LCLKs" and so on. Obov'yazykovim є parameter No Preemption (or Disabled). Moreover, the rest, as a rule, is restored to the mind. This option in such a look is no longer stagnant, so it can be difficult to use it on older machines. If two "master" attachments on the PCI bus are used, the "Disabled" value (or similar) can be replaced more optimally.
The option may be called PCI Preemption Timer.

Peer Concurrency

- (Parallel work or, literally, - equal competition). This parameter allows/fences one-hour pratsyuvati kіlka pristroїv on the PCI-bus. When the option is enabled, additional buffering of read/write cycles in the chipset is enabled. However, problems can be fixed, as not all PCI cards are ready to support this mode of operation. And here the practicality of the system is verified by a final path.
Diya tsієї optsії zachіpaє і spilnu robot PCI-and ISA-tires. For example, PCI bus cycles can be resampled and buffered for up to an hour of ISA operations, such as DMA transfers in "Bus-Master" mode. The parameter can take a value:
"Enabled" (for locking) - allowed,
"Disabled" – fenced.
The option can be called PCI Concurrency or Bus Concurrency. Add-ons to avoid competition are listed in the "PCI/IDE Concurrency" or "PCI-to-IDE Concurrency" options.
PERR#
SERR#
- "AMI BIOS" through the "Enabled" and "Disabled" options (enabled, turned off) propagate "correct" with the interface signals of the PCI bus: PERR# and SERR#. To these signals for finishing, the bus contacts are required - B40 and B42 are valid. Dekilka slіv about the signals themselves.
"PERR#" - I/O PCI Parity Error. The signal is inserted by receiving data on the bus via a bus cycle after the PAR signal is seen (Parity Error - pin A43). The PERR# signal becomes active, as parity parity has been enabled on the PCI bus. When this occurs, the "Enable" bit is set in the PCICMD registry by the PERR # signal. As an option, it is possible to block a signal about a pardon ("Disabled" is set for a lock).
"SERR#" - I/O PCI System Error. The result also sets the "SERRE" bit (SERR # Enable) in the PCICMD registry. The purpose of the integration signal, for the display of such a need for one mind:
1. The PERR# signal is set on the PCI bus, which is controlled by bit 3 of the ERRCMD registry,
2. The SERR# signal will be asserted after one bus clock cycle after a significant failure in data transmission at the PCI-cycle initiation process,
3. The SERR# signal will be set every hour of ECC operations. The ECC pardon is signaled via the ERRCMD control register when correcting a one-bit pardon or a multiple uncorrected one,
4. The SERR# signal will be set if parity parity on the PCI bus is scheduled for the first hour of address data transmission with one-hour setting of such pardon signals in other registers,
5. There may be additional situations, for example, setting the pardon input signal G-SERR # in bit 5 of the ERRCMD registry.