Associative memory of the EVM. Virtual memory. Architectural features to support virtual memory. Sticky organization of memory

Our memory is powerful associativity. This is evident from the fact that, besides the enemy, you can call upon the memory of one another, another – a third, then again. Associative memory consists of connections between environments and phenomena of a surrounding person. Associations are a kind of invisible links that arise from the depths of accumulated memory, surroundings, the manifestation of experienced moments (those that happened) and that are connected from those who need to remember.

Associative theory of memory

Psychology has a number of direct connections with memory. The main ones are associative, behavioral, cognitive, and active. They all agree on the fact that memory is not memorization, saving and creating information and forgetting that memory is the basis of the process of becoming special.

At the same time, from its own principles, the theory of memory in its own way explains the essence and patterns of this process.

One of these theories is the associative theory of memory. It comes from the fact that association is nothing more than a connection that takes place between psychic phenomena. Such connections, when memorized, are inserted between parts of the material that are memorized or revealed. On the right is that in the process of guessing, people always find out what connections are made by the material that needs to be made.

Several patterns have been identified on the basis of which associations are established:

- For money. This is due to the fact that the captured image is associated with past experienced phenomena, or with those that were simultaneously experienced, associated with this principle, then on the basis of a connection with the previous material. For example, having guessed your school, who knows everything, we can guess the name of a school friend and the emotions associated with them, and having guessed a colleague at work, we can probably guess that it’s Saturday - work, and the need to remember to set and an alarm clock for early morning day off.

- For the similarity. Have you noticed that, for example, people guess who? Maybe you wanted, by looking at an unknown person, to recognize some kind of “type” in someone or to discover what kind of person they are (personality, manner of behavior, put it that way) Do you remember how much he looks like...? For example, he’s unforgiving, shaggy, and can waddle around like a witch; small, unostentatious, plump and hopeless in appearance - like a horobets; bright, dignified, with straightened shoulders and long, dignified arms - like a pavich.

- For the contrast. It is very easy for us to associate “white - black”, “good - evil”, “good - bad”. They are also vibrated by our associative memory and vikory memory to consolidate the image. And here we perceive images drawn from the evidence of the underlying manifestation. So, having emerged from the irritated nurse, you will guess how calm her sister seems.

There is not much in the associative theory of memory that explains such an important characteristic as the selectiveness of memory (as well as associative material that is well remembered in the future). In addition, it does not account for the fact that memory processes lie in the organization of the memorized material.

The development of associative memory, as well as associative thinking, is even important: associations help us remember and remember, generate ideas. Associative memory allows us to memorize unrelated words and complex texts, which makes it easier for us to retrieve the required information from memory and a wider range of associative links, thus It’s easier to remember and it’s easier to remember if necessary. Our thoughts about our food, our looks, our tastes, our value system are grounded in associative memory. Our mission is also connected with it, bringing peace to the world and making decisions.

The child's associative memory is trained to connect previously acquired information with new material. For the development of associative memory, you can use the following, for example:

1. Prepare 2 paper papers and a pen. For 1 arch, in the vertical column, write all natural numbers from 1 to 100.

2. Select 10-15 of them with which you have strong associations, and write them in sufficient order on 2 arches. For example, 8 is a snowman, 17 is the number of your favorite minibus, 18 is your birthday in the country, where you live (as you are), etc. After you finish the work, check 5-7 numbers, take 1 piece of paper with numbers and write down all the steps that you have memorized, opposite the number.

3. Next time, try the same numbers with other numbers that were not mentioned before. Don’t force things, don’t push yourself too hard, try as far as possible to select such an association that will reliably take your place on the list.

4. Once the entire list of numbers is completed, turn it over for yourself, indicating all associations associated with numbers from 1 to 100.

In addition to training your memory, you created additional associations to help you remember codes, phone numbers, etc. Just try to show off your particular associations without fear of getting images. For example, 40 can be memorized by imagining 4 as a square, “TV” and 0 as the inscriptions in a new circle, “kolobok”. It looks like a funny association of “Kolobok on TV.” Come up with your own associations that are pleasant for you.

Speaking about the development of memory, it is necessary to note that it is inextricably linked with respect, and even without respect, we cannot transfer it to short-term memory. Good job memory transmits high activity of neurons, which benefits the cognitive functions of the brain. You can read more about the development of memory and respect.

Memory and respect, understanding and mentality are functions of the brain that promote training and development. Regular rights can therefore clearly enhance their benefits, and better give priority to regular comprehensive activities with the interests that are gradually increasing. For example, for this purpose, it’s best to get involved in activities.

We wish you success in your self-development!

Photo: Laurelville - Camp & Retreat Center

Search for the frame number that confirms required page, the large table of pages has a large number of steps to the main memory, which takes many hours. In such situations, such a delay is unacceptable. The problem of speedy search seems to be limited to the level of computer architecture.

Presumably due to the power of locality, most programs over the course of an hour expand to a small number of pages, so only a small part of the table of pages is actively victorious.

Naturally, the most pressing problem has been accelerated - to provide the computer with a hardware device for displaying virtual pages at the physical site without updating the table of pages, so that the small part of the tables can be stored in cache memory, which saves the necessary part of the tables and sides. This device is called associative memory, also known as translation lookaside buffer (TLB).

One table entry in the associative memory (one input) contains information about one virtual page: its attributes and the frame in which it is located. These fields exactly match the fields in the pages table.

The fragments of associative memory can only contain actions from page table entries; each TLB entry must include a field with a number virtual pages. The memory is called associative because it simultaneously updates the virtual page number, which is displayed with a corresponding field in all rows of this small table. Tom Danish species Memory comes at a high cost. The row in which the virtual side field is set to the required values ​​contains the number of the side frame. The initial number of entries in TLB 8 is up to 4096. The increase in the number of entries in the associative memory may be influenced by factors such as the size of the main memory cache and the number of storage units. One command is remembered per hour.

Let's look at the functioning of the memory manager for the manifestation of associative memory.

Initially, information about the displayed virtual page is located in the physical memory. Yakshcho requirement record found - everything is normal, but the blame for the seizures is damage to the privileging, if you drink on the animal to the memory.

If the required entry in the associative memory is daily, it is displayed through the page table. One of the entries in the associative memory is replaced with a known entry from the side table. Here we come up with the traditional problem of replacement for any cache (and which of the entries in the cache must be changed). The design of associative memory is required to organize records in such a way that decisions can be made about those from old records that may be deleted when new ones are made.

The number of distant searches of the page number in the associative memory in relation to the total number of searches is called hit ratio (proportion, ratio). Sometimes the term “hundreds of cache hits” is also widely used. Thus, the hit ratio is a part of the plan, which can be divided into parts of associative memory. Scrolling down to these very pages improves the hit ratio. The greater the hit ratio, the shorter the average hour of access to the data in RAM.

It is acceptable, for example, that the assigned address for a cache miss through the side table requires 100 ns, and the assigned address for a cache hit through associative memory requires 20 ns. With 90% hit ratio, the average hour of the assigned address is 0.9x20 + 0.1x100 = 28 not.

It is very pleasant for the productivity of current operating systems to improve the efficiency of vicarious associative memory. The high importance of data availability in associative memory is associated with the presence of data of objective authorities: spatial and temporal locality.

It is necessary to show respect for the upcoming fact. When changing the context of processes, it is necessary to ensure that the new process does not “retain” information in the associative memory that must be transferred to the previous process, for example, to clear it. In this way, the use of associative memory often interferes with the context.

The main (associative memory + table of pages) address transformation scheme is examined with a bright example of the memory hierarchy, based on the vicoristic principle of locality, which was discussed in the introduction to the previous lecture.

A memory device, as a rule, contains no other elements that create memory, which create a memory array (SM). An array of divisions around the middle; the skin on them is intended for preserving double code The number of discharges in each is determined by the width of the memory sample (for example, there may be one, half or a number of machine words). The method of organizing memory depends on the methods of placing and retrieving information in a memory array. For this purpose, address, associative and stack (store) memory are distinguished.

Address memory. In memory with an address organization of placement and search of information in the CM, it is based on the corresponding addresses of storing words (numbers, commands, etc.), the address being the number in the middle of the CM, in which the word is located.

When writing (or reading) a word in the MM, the command that initiates this operation must indicate the address (middle number) behind which the recording (reading) is to be carried out.

A typical structure of address memory is shown in Fig. 4.2, remove the memory array from N n-bit centers and the hardware frame that includes the address register RGA, may k(k> log 2 N) discharges, information register RDI, address selection block BAV, reading block BUS, block of discharge booster-shaping signals for recording BUZ This memory control unit BUP.

4.2.Structure of address memory.

For the address code in RGA BAV forms signals in the middle of the memory that allow you to generate words in the middle of reading or writing.

The cycle of generation to memory continues until BUP call the signal Zvernennya. The final part of the beast cycle includes the reception RGA z address bus SHA address zvernennya and reception to BUP decryption of the carrier signal Operation, indicates the type of operation that is being queried (reading or writing).

Distance when read BAV decrypts the address, sends read signals to the tasks by the address in the middle ZM, in which case the code of the word written in the middle is read by the readers BUS and is transmitted to RDI. Then the memory from the initial readings (after reading all the elements that need to be remembered, the middle ones are inserted into the zero camp). information is regenerated in the middle of recording in it RDI medicinal word. The reading operation is completed by seeing the word s RDI to the output information bus SHIVih.

When recording, in addition to the designated part of the writing cycle, the recorded word is received from the input information bus ШІВх V RDI. The recording itself consists of two operations: clearing the middle (resetting to 0) and recording. For whom BAV start by selecting and cleaning the center specified by the address in RGA. Clearing is indicated by signals for reading the word in the middle, but in this case the additional reading is blocked BUS V RDI No information available. Then you select BAV the word z is written in the middle RDI.

Keruvanya block BUP generates the necessary sequences of signals that initiate the work of adjacent memory nodes. The signal transmission lances that are controlled are shown as thin lines in Fig. 4.2.

Associative memory. In this memory, the search for necessary information is carried out not by the address, but by its place (by the associative sign). In this case, the search for the associative sign (or sequentially for the adjacent ranks of this sign) is generated in parallel in the clock for all parts of the array memory. In many cases, associative search allows you to simplify and speed up the processing of data. This is due to the fact that in this type of memory the operation of reading information is combined with a series of low logical operations.

The typical structure of associative memory is shown in Fig. 4.3. Memorable massif to take revenge N(P + 1) - discharge centers. To indicate employment, the nth digit of the service is entered in the middle (0 - the middle is strong, 1 - the word is written in the middle).

By input information bus ШІВх the register has associative marks RDAP the discharge 0-i-1 is found P- bit associative field, and mask register RGM - I'll look for the mask code, and nth rank RGM is set to 0. Associative sound only works for the totality of discharges RDAP, what they say 1 in RGM(unmasked discharges RDAP). For those whose numbers in the ranks coincided with unmasked ranks RDAP, combination scheme KS installs 1 in the secondary digits of the escape register RgSV and 0 to other categories. In this manner, it is significant j-ro rank in RgSV signified by viraza

RgSV(j) =

de RDAP[i], RGM[i] that ZM - the value of the i-th category is consistent RDAP, RGM the jth room ZM.

Combination scheme for shaping the result of associative interaction FS forms these words, what happened in RgSV, signals  0 ,  1 ,  2 , which indicate the occurrence of surges ZM, What satisfies the associative sign, the visibility of one and more than one such word. For whom FS implements the following Boolean functions:

 0 =

 1 = РгСв

 2 =  0  1

Molding instead RgSV and signals  0,  1,  2 instead RDAP, RGMі ZM is called an association control operation. This operation is warehouse The operation of reading and writing, although it has independent meaning.

When reading the bud, association control is carried out for the associative sign RDAP. Then at  0 = 1 the reading is affected by the totality of the information being read, when  1 = 1 it is counted in RDI word found, with  2 = 1 in RDI The word in the middle is taken into account, which has the lowest number of the middles, valued 1 in RgSv. Z RDI the healing word appears on SHIVih.

Rice. 4.3. Structure of associative memory

When registering, the first payment will be free. What is the purpose of the association control operation? PrgAP= 111. ..10 ta RGM== 00... 01. In this case, the middles are counted as 1 in RgSv. For recording, the middle order of the lowest number is selected. She writes down the word that came from ШІВх V RDI.

Rice. 4.4. Stova's memory

For an additional operation of association control, you can, without counting from memory, use instead RgSV, How many words are in the memory that satisfy the associative sign, for example, to realize the type of question, how many students in the group have a significant assessment of the discipline. With different types of combinational circuits in the associative memory, a number of complex logical operations can be added, such as searching for a larger (smaller) number, searching for words, placing them at important boundaries, search for the maximum (minimum) number and number.

It is important that for associative memory there are necessary elements that can be memorized and that allow reading without destroying the information written in them. Therefore, due to the associative search, reading is carried out at every ZM of all unmasked discharges and nowhere to save information, which is now constantly in conflict with readings.

Stova's memory, as well as being associative, it is also addressless. IN stack memory(Fig. 4.4) the middles create a one-dimensional array, in which the middles are connected one to the other by discharge lancets of water transfer. The recording of a new word is carried out at the top room (room 0), and all previously recorded words (including the word that was in room 0) are collapsed down into the upper rooms with large numbers by 1. Reading can only be done from the upper (zero) middle of the memory, in which case, when reading from the past, the left memory is pushed up into the upper middle with large numbers. In whose memory the order of reading the words follows the rule: fixing the rest - First to be served. In a number of devices of the type we are looking at, the operation of simply reading a word from the zero column (without deleting and storing the word in memory) is also transferred. Some stack memory is protected by a stack cleaner. SchSt, shows the number of words entered into the riddle. Signal Schst = 0 indicates an empty stack, Schst = N - 1 – full stack.

Stack memory is often organized in parallel with address memory. Widely stagnant stack memory is known during the processing of nested data structures.

The following paragraphs of the chapter describe the different types of salary with targeted organization. Associative memory is used in the hardware of the dynamic part of the GPU, as well as for activating the Cache memory.

Memory with associative access or associative memory It differs from other types of memory in that the processing up to the end is not based on the specific address, but on the instead in the middle of memory. In fact, associative memory works like this Poshukova system You need to know the information behind the given phrase. To form the basis of associative memory associative memory devices(ASU), which, like most operational memories, are energy-saving and are implemented in the form of conductor chips (chipsets).

The principle of operation of the ASU is explained by the diagram shown in Fig. 3.8.Memory array, as in address storage, divided into m-discharge centers, number of them n. As a rule, the ASU warehouse includes:

· Memory massif (ZM);

· Register of associative marks (RgAP);

· Mask register (РгМ);

· Register of address indicators with input equalization schemes.

There may be other elements in the ASU, the appearance and functions of which are determined by the method of vicarious ASU.

Rice. 3.8. Associative memory device

Selecting information from the ABC is done like this. In the register of associative signs, the search engine is transmitted from the control device - code symbols of the information sought(Sometimes they call it comparand). The code can match a sufficient number of discharges – view 1 before m. If the code sign is modified again, you must go to the equalization scheme without changing it, since it is necessary to modify only part of the code, so that unnecessary bits are masked with an additional mask register. Before starting to search for information in the ACU, all ranks of the address indicator register are installed 1 After this, the first category of all the middle ones is studied, the array is memorized, and instead the register of associative signs is equalized with the first category. Instead of the first category i The th middle is not spared instead of the first digit of RGAP, then the corresponding digit of the address indicator register T i drops off at the camp 0 how to avoid – discharge T i loses 1 . Then this operation is repeated with another, third and subsequent discharges until no equalization has been made with all the discharges of RGAP. After extensive training and leveling at the camp 1 lose those ranks in the register of address indicators, which correspond to the endings, in order to contain information that avoids the associative marks recorded in the register. This information may be provided in the order indicated by the device.

Dearly, when searching for information in the ZM, the associative sign must be based only on the number of discharges of the sign and the fluidity of the discharges, but not on the number of middle points in the ZM. This indicates the main priority of the memory storage unit before the address storage units: in the address storage units, during the search operation, it is necessary to enumerate all parts of the array memory. On the other hand, to understand the implementation of the ABC, conclude the search immediately with all the ranks of all the words written down for the riddle, then. I'll search for an hour similar devices does not override the memory cycle.

Record new information ZM is carried out without inserting a number in the middle. Call one of the categories of the skin in the middle of the vikoryst for inserting its employment, then. If the middle is valid for recording, then in what category of recordings 0 , and if I’m borrowed, - 1 . As soon as new information is recorded in the ACU, a sign is installed 0 In the corresponding category of the register of associative signs, all the middle units of the symbols that are valid for recording are identified. In one of them, the device will contain new information.

Often, ASUs are designed in such a way that, in addition to associative ones, direct addressing of data is also allowed, which represents ease of use when working.

It is necessary to note that the elements of the memory that are to be remembered are replaced by the elements of the addressed memory, it is necessary not only to save the information, but also to save the songs logical functions Therefore, one is allowed to make a search not only for the sake of equality instead of the middle given sign, but also for other minds: instead of the middle there is more (less) comparand, and also more or one (less or one).

Designated as the most powerful ASU characterize the advantages of the ASU for processing information. The formation of multiple streams of identical information behind an additional RAM is done quickly and simply, and with a large number of operational elements, highly productive systems can be created. It is also necessary to take into account that on the basis of associative memory it is easy to change the place and order of information distribution. Finally, this ASU has an efficient way of forming data sets.

The investigations show that a whole range of tasks, such as processing radar information, image recognition, processing various images and other tasks with a matrix data structure, are effectively implemented There are associative systems. Moreover, programming such commands for associative systems is much simpler than for traditional ones.

Unfortunately, memory devices with associative access have high complexity of design and performance, which outweighs similar performance of dynamic and static RAM. Associative memory is the basis for motivating parallel associative systems, as well as for sensory systems, supported by the flow of data. The most widely associative access is found in cache memory subsystems.

Cache memory

The first noble memory was created by M. Wilkes in 1965 with the creation of EOM Atlas. The essence of the approach lay in a small-size swidden buffer memory located between the CPU and VP. In the EOM process, those OP plots that are being mined are copied into buffer memory. For the expansion of the principle of locality, there is a significant gain in productivity.

A new type of memory has been given a name cache memory(English version) cache- “shovanka, corner”), since such memory is stored, “invisible” to the CPU, which can immediately reach it. Your programmer may not even know about the cache memory. For serial EOMs, cache memory was first installed in model 85 systems of the IBMS/360 family. Today's cache memory is in some EOM class, and often has a rich structure.

All terms defined previously may be used for cache memory, although the word " row» ( line) is often used instead of the word “ block» ( block).

As a rule, the cache memory will be based on high-speed and expensive RAM of the static type, with which the speed exceeds the speed of the VP by 5-10 times, and 500-1000 times less. Please note that the increase in cache memory in relation to the capacity of the VP does not exceed the same and the value of static RAM is not so high. On the right, with an increased capacity of cache memory, the complexity of control circuits increases, which, in its turn, leads to a drop in the speed code. Numerical studies have shown that the performance of cache memory and VP is optimal and saves money during the development of EOM due to increased speed of both types of memory.

As stated, the CPU does not have direct access to the cache memory. A special controller is responsible for organizing the interaction between the CPU, VP and cache memory. The entire OP is divided into blocks of fixed data, with its highest part of the OP address meaning block addresses, and the younger part - addresses of the word in the middle of the block. The exchange of information between VPs and cache memory operates in blocks. The cache memory also has its own internal addressing, and the treatment block for VP is located in the cache memory behind the song memory address of the block in cache memory. Cache memory blocks are often called in rows or else cache rows.

Since the block that is being created is fed from the CPU side, already at the cache memory, its reading is completed already before the cache memory. Thus, having ensured access to any address, the controller must first determine which block is copied in the cache memory to place this address, and what is it, then determine at which cache memory address this block begins. The controller rejects this information for further assistance. address conversion mechanism. The foldability of this mechanism lies in placement strategies,Initially, place the VP block in the cache memory of the trace.

No less important is the information about those who need to place a copy of the block with the OP in cache memory. This is food looking for help sampling strategies.

When writing to the cache memory, a number of methods are used to replace old information that is stored main memory update strategy.

The situation often arises when, regardless of the selection from the VP of the necessary block, there is no place in the cache memory for its placement. In this case you need to select one of the cache rows and replace it with a new block. Method for assigning a cache row, which is visible replacement strategy.

Placement strategies

There are the following methods for storing data in cache memory:

· Straight split;

· completely associative division;

· Partially (multiply) associative division.

Acceptable address bus capacity n also the capacity of VP V OP = 2 n drain Without exchanging capacity, the size of the cache row is 256 rows, so the entire OP will be divided into 2n-8 blocks Addressed to VP seniors n-8 The bits represent the address of the block, and the low byte is the address of the word in the block. Stop the cache capacity V cache 1024 times less for VP capacity, then. V cache = 2 n-10 either 2 n-18 blocks (cache row).

Straight split

Since each block of main memory has only one fixed location, which can appear in the cache memory, this cache memory is called cache from a direct split(Direct mapped cache). This is the simplest organization of cache memory, if in order to map the address of the OP blocks to the cache memory addresses, the youngest bits of the address of the block are simply selected. In this way, all VP blocks that still have new ranks at their address are reduced to one cache row, then.

(Cache row addresses) = (Addresses to OP block) mod (number of blocks in cache memory)

Our application has cache row addresses c become younger n-18 address bit to the VP block (div. Fig. 3.9). The reorganization of the address of the VP block at the address of the cache row involves the process of selecting young ones n-18 bit. For this address, the cache rows can be located in any 1024 VP blocks, which can however be n-18 young bit. The blocks between each other are separated by the highest 10 bits t, call tag. In order to determine which VP block itself is stored in Danish hour the cache memory has one more memory - that's what it's called tag memory (tag memory). Tag memory is addressed sequentially, and the skin word has a size that is equal to the size of the tag. Tag memory capacity – this means that the size of the tag will cover the total number of cache rows, for the butt set 10 2 n-18 bit. The tag memory address is the cache row address h. In addition to tag memory, the memory in which blocks are saved and placed in the cache is called remember the data. The data memory is addressed after its addresses are created from the cache row address and the word address in the middle of the block (cache row).

Rice. 3.9. Structure of the memory address under the hour of direct distribution

Rice. 3.10. Organization of cache memory with direct distribution

Upon access to A th address VP (small 3.10) young n-18 block address bit (field c), where these addresses are located, vikoristavuyutsya as addresses of the cache row. Following the address of the cache row from the tag memory, the tag is read (field t). At the same time, there is access to the data memory for additional assistance. n-10 young bit addresses A(fields cі w). How to treat tags and older 10-bit addresses A are avoided, which means that the block is to be placed on the address A, is in the data memory, and in the word, until access is made, a copy is saved A- VP addresses.

Since the tag is subdivided into the highest 10 bits of the address A, then a block is read from the main memory to place the address A, and from the cache memory the cache row is displayed, whose addresses are indicated by the field c(younger n-18 bits) address of the read block. In place of the remote cache row, reads from the OP block are placed, at which the corresponding tag memory of the tags is updated.

The advantage of direct partitioning is the simplicity of implementation, however, due to the fact that the cache row addresses are uniquely assigned to the address of the VP block, there is a high degree of consistency in the concentration of block areas in the active part of the cache memory. Blocks in this part will need to be replaced frequently, at the same time that other areas of the cache memory may be idle. In such a situation, the efficiency of cache memory significantly decreases.

Restrict access to information that will remember, insert, and add addresses in the middle. However, it is much more important to look for information not by its address, but by focusing on any characteristic sign that is located in the information itself. This principle underlies the memory, known as an associative device (AD). In the literature, there are other names of similar to memory: memory, addressed by replacement (content addressable memory); memory, addressed for data (data addressable memory); memory from parallel search memory; catalog memory; information storage; tag memory.

Associative ZU– this is a device designed to save information, match it with a given word and indicate its similarity or dissimilarity to one another.

Instead of primary machine memory (accessible memory or RAM), in which the device sets the memory address and the RAM rotates the data word that is saved at this address, the AP is divided in such a way that Istuvach asking the word data, and AP searches for everyone's memory in order to understand what is being saved here. When a data word is found, the AP turns the list of one or more storage addresses where the word was found (and in some architectures, it also turns up the data word itself, or other related parts of the data). Thus, AP is a hardware implementation of what in programming terms would be called an associative array.

Associative sign – sign of how to search for information.

Look for a sign – code combination, which is the role of the expression for the joke.

The associative sign can be partially searched for information or additionally supplied with it. It is customary to call something a tag or a label.

Structure of associative memory

ASU includes:

• a memory array for saving N m-bits, the skin of which number of young discharges is occupied by service information;
• register of associative signs, where the code of the searched information (search sign) is located. Register size k make less noise, make more words T;
• escape schemes, designed for parallel equalization of the skin tone of all the parts that are saved, with a corresponding signal for signs of detection and vibration of escape signals;
• the register of escapes, where the memory array corresponds to one category, in which one is entered, since all the discharges of the corresponding sequence coincided with the same discharges of search signs;
• a mask register that allows you to protect the alignment of song beats;
• a combination circuit, which forms signals on the analysis platform instead of the escape register that characterize the results of searching for information.

When the memory is upgraded to the ASU, the ranks in the mask register are reset to zero, as it is necessary to respond to the search for information. All discharges in the escape register are set to a single value. After which the code of the searched information (search sign) is entered into the register of associative marks and the search begins, in the process of which the schemes will immediately equalize the first bit of all middle memories and an array of search signs with the first bit. Those circuits that have detected the separation generate a signal that transfers the positive bit to the fault register at the zero station. The process of searching for other unmasked bits of search signs is also carried out. Through the war, units are saved from these ranks in the escape register, which indicates the middle where the information is being searched. The configuration of units in the escape register is determined as the addresses for which the array is read. Because the results of the search may be ambiguous, instead of the escape register, it is fed to the combination circuit, and signals are generated that indicate the information:

• a0 – not found;
• a1 - place in one middle;
• a2 - place more at the bottom in one middle.

The formation of the escape register and signals a0, a1, a2 is related to the association control operation. This is a warehouse operation of reading and writing, although it may have independent significance.

When read from the beginning, the control of association behind the search argument is concluded. Then, when a0 = 1, reading is affected by the totality of the information being read, when a1 =1 The word is counted as indicated by the one in the loss register, and with a2 = 1 The highest unit in the escape register is removed and its corresponding word is added. By repeating this operation, you can sequentially capture all the words.

Registration in the AP is carried out without assigning a specific address, in the first place. In order to understand the full middle, the reading operation is completed, which is not masked beyond the service level, to show how long ago the effort was carried out before this middle, and it is important to respect either the empty middle, or cue found without vikorystuvavsya.

The main advantage of associative memory is indicated by the fact that when searching for information, it should lie only within the number of discharges in the sign of the search and the fluidity of the discharges and not lie within the number of middles in the arrays And that will be remembered.

The complexity of the idea of ​​associative search for information completely includes the diversity of ASU architectures. A specific architecture is determined by a combination of four factors:

1. looking for information;
2. technology leveling sign;
3. the method of reading information in case of multiple errors;
4. method of recording information.

For each specific person, the information given in the search for information can be formulated differently.

See the search for information:

• Simple (it is necessary to completely avoid all digits and search for the same digits of words that are stored in an array that will be remembered).
• Folding:
• Listen for all words, greater or lesser than the given one. Search at the assigned boundaries.
• Search for maximum and minimum. A large-scale selection from the ABC of words with maximum or minimum values ​​of associative signs (after all, in a further search), in essence, is an ordered selection of information. An ordered selection can be ensured in another way, which is to conduct a search for words, associative signs of some kind of signs of experience and the nearest larger and smaller values.

Obviously, the implementation of folding methods is connected with similar changes in the architecture of the automated control system, including the folded circuit diagrams and the advancement of additional logic to it.

Technique of leveling sign:

When prompted by the ACU, you can choose from four options for organizing training instead of memory. These options can be combined in parallel by group of discharges and sequentially by groups. When searching for the most effective way, it is possible to use parallel training in both words and categories, but not all types of elements that can be memorized allow such possibility.

Method of reading information in case of multiple failures:

• With the lance of blackness (in addition to adding a folding device, words are fixed that create a rich meaning. The lance of blackness allows you to read the words in the order of increasing numbers in the middle of the ABC, regardless of the size of the asoc ative signs).
• Algorithmically (as a result of a series of experiments).

Method for recording information:

1. For the address.
2. With the sorting of information at the input of the ASU according to the value of the associative sign (place the placement in the middle where the new word will be placed, lie down as a result of the relationship of the associative sign of the newly recorded word and words, then take care in the ABC).
3. There is a sign behind the runway.
4. From the lancet of blackness.

Due to the apparently high quality of memory, AMS is rarely recognized as an independent type of memory.